ABSTRACT
The constant reduction in the dimensions of the integrated devices, has enabled great advances in the performance of computer systems. Modern systems operate at the GHz frequency and have integrated memories at the level of the CPU chip. However, this progress has been accompanied by several challenges. One of the main points is the integrity of the memory circuits in conditions of interaction with the external environment, that is, to keep the memory cells operating correctly during the operations of write, read and while storing a value. The robustness of SRAM memories is related to the ability of not change the stored value in the occurrence of fault. Currently, the collision of particles, previously restricted to space environments or hostile to radiation, begins to affect the behavior of integrated circuits, even at the grounded level. Considering that SRAMs performance is directly linked to the performance of computer systems, evaluating the effects of these strikes on this type of memory is extremely important. In this work, four topologies of SRAM cells are analyzed: 6T, 8T, 9T and 8T-SER. All were designed using 16nm CMOS predictive technology model. For each cell, the delay times, energy consumption, noise tolerance and radiation robustness were observed. These characteristics were evaluated for the three operating states of SRAM, that is, in the reading, writing and storage operation. Cell 8T showed the shortest writing delay and lowest energy consumption, while cell 6T showed the shortest reading delay. The 8T-SER cell, showed the highest tolerance in all noise margins and greater robustness to the radiation effects.